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Platform Conference 2002
February 05, 2002   Tuan GXS Nguyen > [View My Other Articles]
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AMD Hammer


Intel can’t touch this

One of the main topics at Platform this time was AMD’s Hammer core, an 8th generation processor core with two cores, one handling 32-bit instructions and the other one handling 64-bit instructions. What’s unique about AMD’s Hammer core compared to Intel’s IA-64 architecture is that it is able to run legacy 32-bit programs without the use of emulation. We all know that emulation is always slower than hardware processing, so AMD’s two-core design for Hammer will greatly help the move from 32-bit software to 64-bit.

Ever since its conception some years ago, Intel’s IA-64 architecture has been all but widespread. Because of its sharp abandonment for 32-bit support, IA-64 was too much, too soon. Currently, IA-64 is featured in the Itanium processor and is effective in a very small sector of the processor market distribution. Most workstations and servers are currently populated by Intel’s more popular Xeon processor and other processors like Alphas, already at 64-bit.

Understanding the situation that Intel is in, AMD immediately sought to take full advantage of it and thus we have Hammer. But Hammer isn’t just about a hybrid 64/32-bit architecture, it also features a full-fledged DDR memory controller right on the die.

No more north bridges?

When you purchase a motherboard, you’re likely to be concerned about which chipset it uses, how it performs, etc. One of the most important things is what type of memory it uses. This is in fact determined by the north bridge, usually the larger chip in a chipset. The northbridge is large because of two reasons: it’s has to connect with both the processor and the south bridge and it has a memory controller to interface with the system memory.

AMD suggests that processors are currently held back by memory bottlenecks, and in a nutshell that is indeed the case. Remember back when AMD was still using L2 cache exterior to the processor core and how the Athlon’s performance really bit the dust? When AMD moved the L2 cache on die, performance shot through the roof and took back Intel’s brief performance lead with the Coppermine core. AMD’s idea with the memory controller is the same; bring it onto the core.

The Hammer core will support all current DDR technologies but will also support future technologies via new chips. This almost removes the need to upgrade your motherboard in some sense. Featuring a crossbar memory architecture, expect to see Hammer taking full advantage of high speed DDR memory well beyond DDR333. Unbuffered and Registered modules are supported as well as an 8 or 16-byte interface for support of up to 8 DIMM slots.

Before you get worried about VIA, SiS and ALi disappearing, they still have a huge role in chipsets. The memory controller is only part of the northbridge and there’s still the AGP controller as well as the interconnecting bus between it and the south bridge. Northbridges will still be integral to the entire chipset but they just won’t be the link between the processor and memory anymore.

Too legit to quit

After a lot of thought and consideration, Intel is currently deciding on a similar 64-bit/32-bit hybrid design like Hammer. However, the implications of such a quick design turnaround may be tough because Intel is already so far into its production schedule. A processor usually takes a few years of design before it even gets a chance at fabrication and a 64-bit/32-bit solution from Intel may not be viable when it does reach stores, if ever.


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NVIDIA didn’t show up with booze like it did at the previous Platform Conference. Too bad – NVIDIA knows how to host a party.

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