SDR or DDR?

Caching in on buffers

Thanks to its use of 0.13u process, the i845 employs a L3-like write cache into the die. This high-speed memory keeps data right at the processor's fingertips. Writing information from CPU to system memory takes a considerable amount time, with many steps to walk through. With the new write cache inside the MCH (memory controller hub, which is inside the i845 northbridge), data can be written directly to memory in much faster time than reissuing data from inside the CPU. It's commonly known that L2 cache makes things easier for the CPU and overall system performance by providing the CPU with data right at hand. The i845 MCH write cache works in very much the same way, except it focuses on allowing the CPU to write quickly to system memory rather than read from it.

High-speed write caches alone do not make a high-performance CPU subsystem. To assist the CPU and write cache in keeping a high data throughput at sustained levels, the i845 employs deep data buffers. Think of this buffer as the memory buffer on a CD-RW drive without buffer-underrun techniques like BURNProof. Because a write process cannot be interrupted, a CD-RW must contain a memory buffer that's able to send data faster than the drive can write to the CD. This ensures that the drive is never left without information to write. If we now increased the write speed of the drive beyond the feed speed of the buffer, the buffer will eventually run out of data and the burn process will be ruined.

To counter this, we can increase the size of the buffer so that it takes longer to deplete. This gives whatever is sending data to the CD-RW drive (most likely the hard drive), more time to catch up and fill the buffer. Now that the buffer can hold more data, we can increase the write speed without worrying that our buffer will be emptied. Inside the i845, its 12-level deep In Order Queue (IOQ) buffers ensures speedy sustained memory throughput without worry of drop-offs. Compare this to the P4X266's 8-level deep buffers and we can see why the i845 would make a formidable DDR chipset.

PC133/PC100 SDRAM receives new life?

With the write cache and deep buffers inside the i845, does this mean that the current SDR i845 solution gives a boost in memory performance? Not quite. Considering that PC133 SDRAM can only offer a maximum throughput of 1.06GB/sec, PC133 can't even begin to satisfy a Pentium 4 running at 1.5GHz, let alone the latest 2GHz blazer. Remembering back to Intel's RDRAM days, there's a real reason for Intel choosing RDRAM as its preferred memory for the Pentium 4 - bandwidth. To perform at its peak, the Pentium 4 requires massive amounts of memory bandwidth, and at the time, only PC800 RDRAM was able to provide such speeds. A Pentium 4 running at 1.5GHz requires 1.5GB/sec of memory throughput; a far reach for PC133.

In the end, the question begging to be asked is, why i845 PC133? If we look at the professional market, which has yet to fully embrace DDR RAM, a SDR platform makes perfect sense. Proven, trusted, cheap, and easily upgradability make any i845 SDR solution a smart choice for IT professionals. Performance freaks on the other hand, begrudge i845 as a cheap performance-killer, and look forward to Intel's slated release of the i845 DDR chipset in early 2002.